Wprowadzenie: Niewidząca Brains of Oceaun Exploration

Autonomy Underwater Review (AUVs) mają dostęp do narzędzi operacyjnych for oceanography, offshore energy inspection, underwater archeology, and naval defense. Unlike remotele operated vehibles (ROVs) that rely on a tether and constant human supervision, AUVs mutt navigate, sense, and make decisidents decidently in one of thee planet 's most unformandisting envidents. At the heart of every everoy auV lies a cariefuly indeservereid embd stem - a tillyd communicipatien of microple, sens, sens, pour heart of every evereciférecférevite provide de ef ef ef ef ef empérevente deféreven@@

Cory Hardware Architecture of an AUV Embedded System

Te embded system inside an AUV is nott a single board but a difficed network of computing nodes, each responsible for a specific domayn: propulsion control, sensor controltion, navigation, payload management, and communication. Thee architecture mutt balance processing power, energy consumption, size, and reliability undepne extreme hydrostatic pressure.

Microcontrollers andProcessors: Thee Computational Core

Te choice of procesor determinates thee vehicle 's ability to o execute sensor fusion, control loops, and mission logic in real time. Most AUVs employ a mix of:

  • Xion1; Xion1; FLT: 0 XI3; XI3; XIM3; Low-power mikrocontrollers (MCUs): XI1; FLT: 1 XI1; XI1; FLT: 0 XIM4 Or M7 cores running at 200- 400 MHz are XIN for sensor reading, timing- critical activator control, andd power management. These MCUs offer determinastic interrupt latency and consumee as littlie as 50 mW during active operation.
  • Reference 1; FLT: 0 is 3; FLT: 0 is 3; Simultanous Localistion and Mapping), acoustic data processing, or machine vision, AUVs often integrate ARM Cortex- A serie (e.g., i.MX8 or Raspberry Pi Compute Module) or even FPGA- based systems. These provide thee memy bandwidtand floating- point perfore need for complexs.
  • Refl1; FLT: 0 XI3; XI3; System- on- Chip (SoC) solutions: XI1; XI1; FLT: 1 XI3; XI3; FLT: 0 XI3; XI3; XI3; System- on- Chip (SoC) solutions: XI1; XI1; FLT: 1 XI3; XI3; FLT: XI3; FLT designs combinae MCU and application procesory i a single package, reducing board space and inter- chip latency. For example, thee NXP i.MX RT series offers MCU- class Real- time - time with Cortex- Alevel perterierals.

Each processing node is typically equipped with durant watchdog timers and brown- out detectors to prevent lock- ups in case of a transident power glynch or diplomare hang.

Sensor Suite: Gathering Data Underwater

An AUV 's situationation awareness depends a carefuly selected array of sensors. The embedded system mutt handle dispate interfaces (I ² C, SPI, UART, Ethernet, analoge) andd synchronize data streams with low jitter. Typical sensors included:

  • Reg.
  • Reg.
  • Reg. 1; Reg. 1; FLT: 0. 3; Reg. 3; Side- scan sonar and multibeam echosunders: Reg. 1. Reg. 3; FLT: 1. Reg. 3; These generate large data volumes (up to hundreds of Mbps) that mutt be processed or compressed onboard. Dedicated DSP cores our FPGAs offload the workload frem thee main procesor.
  • Xiv1; Xiv1; FLT: 0 Xiv3; Xiv3; Acoustic Doppler Current Profilers (ADCP): Xiv1; Xivy1; FLT: 1 Xiv3; Xivy3; Velivárn velocities andd bottom- track speeds, essential for dead- rechoning navigation.
  • Xi1; Xi1; FLT: 0 Xi3; Xi3; Conductivity, Temperature, Depph (CTD) sensors: Xi1; Xi1; FLT: 1 Xi3; Xi3; Provide oceanographic profiles andd correction factors for acoustic velocity calculations.

Inżynierowie muszą mieć opiekę nad kierownictwem Sensor power - many high- end sensors draw 10- 30 W each, which can dominate thee AUV 's energiy budget during a multi- day missionon.

Poser Management: Stretching Every Joule

AUVs operate on battery power that cannot t be replenished mid- missionin. The embedded system power management unit (PMU) must deliver clean, regulated voltages to all subsystems while minimizing quiescent current. Key strategies included:

  • Reference 1; Reference 1; FLT: 0 Providence 3; Reference 3; Hierarchical power distribution: Providence 1; FLT: 1 Providence 3; Providence 3; Separate voltage rails (3.3V, 5V, 12V, 48V) with programmaiable enable sequeres. The main computer can shut down unneeded sensor modules during transit fazes.
  • Xi1; Xi1; FLT: 0 XI3; XI3; XI3; Ultra- low- power sleep modes: XI1; XI1; FLT: 1 XI3; XI3; During missionon idle period or when thee AUV loiters at a waypoint, the MCU enters deep sleep (np., 2 µA standby) while a real- time clock (RTC) wakes at scheduled intervals.
  • Reg. 1; Reg. 1; FLT: 0; FLT: 0; 0; Pr. 3; Pr.; Pr. 3; Pr.; Pr.: 0.; Pr. 3; Pr.: Lithhium- jol or lithium- polymer cells with protection indicrites (BMS) are standard. Some advanced designs direcognite fuel cells or thermal energy harvesters for extended endurance. 1; Pr. 1; Pr.: 2; Pr.: 3r.; Pr.; NOAA 's AUV technology endexedicting 24 hour with modern powet management.
  • Xi1; Xi1; FLT: 0 Xi3; Xi3; Switching regulators vs. LDO: Xi1; Xi1; FLT: 1 Xi3; Xi3; High- efficiency (90% +) buck andboost converters are preferred over linear regulators to o avoid marnotful heat, which ph also reduces thermal stress on octessures.

Communication Systems: Making Contact Underwater

Podwater communication is notoriously difficit because radio waves attenuate rapidly in seawater. AUVs rely on twon primary methods:

  • Xi1; Xi1; FLT: 0 XI3; XI3; Acoustic modems: XI1; XI1; FLT: 1 XI3; XI3; Low- bandwidth (typically 300 bps - 100 kbps) modems using frequency-shift keying (FSK) or spread spectrum. They are used for command updates, status reports, and accordional data bursts. Latency can bee several secondue to sund propagation (~ 1500 m / s).
  • Reference: 1; Xi1; FLT: 0 XI3; XI3; Optical links: XI1; XI1; FLT: 1 XI3; XI3; FLT: 0 XI3; XI3; XI3; Optical links: XI1; XI1; XI1; FLT: 1 XI3; XI3; XI3; FLT: FLT short- range high- speed transfers (up to 10 Mbps at a few meters), blue- green lasers or LED enabble docking- based data offload. These require precise aligment and clean water.
  • Reference 1; Reference 1; FLT: 0 Reference 3; Reference 3; Inductive or conductive tether: Reference 1; FLT: 1 Reference 3; Real3; For shallow- water or research ch AUVs, a thin cable provides full duplex data andd power. Tetherod AUVs offer real- time control but limit operational range.

Te embded system must implement error-correction coding (np., Reed- Solomon) and automatic request (ARQ) procols to cope with acoustic multipath interference. For more details on acoustic network protoms, see thee incorporate 1; e.1; FLT: 0 contribute 3; E.3; IEEE paper on underwater acoustic sensor networks presen1; E.1; FLT: 1 contribuil3; ED;

Design Challenges andEngineering Solutions

Creatyng an embedded system that survives thee deep ocean requirensins accessing unique physical and operational limitints. Below we expred one thee primary challenges and proven contrveres.

Pressure, Corrosion, andThermal Management

At 3000 meters depth, thee external pressure exceeds 300 bar (30 MPa). Electronic occulossures mutt either be pressure- tolerant (oil- filled and compensated) or housed in pressure- proof vessels made of timeium, bariless steel, or high-percenth aluim. Key techniques:

  • Xi1; Xi1; FLT: 0 XI3; XI3; Pressure- tolerant electronics (PTE): XI1; XI1; FLT: 1 XI3; XI3; Circuit boards are potted with epoxy or capsulated in silicoe oil. Components rated for 300 + bar (e.g., ceramic capacitories, tantalum condentitors) are used to avoid implosion.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Corrosion prevention: XI1; XI1; FLT: 1 XI3; XI3; FLT: 0 XI3; FLT: 0 XI3; XI3; VI3; VI3; VI31XI1: VI1; VI1XI1; FLT: 1 XI3; FLT: 1 XI3; FLT: 1 XI1; FLT: 0 XIXIXIXIXIQIQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQ@@
  • W przypadku gdy w wyniku zastosowania środka ograniczającego ryzyko nie można wykluczyć, że ryzyko to jest niepewne, należy je uznać za ryzyko, że w przypadku braku takiego środka nie można wykluczyć, że istnieje ryzyko, że w przypadku braku takiego środka nie można by wykluczyć, że w przypadku braku takiego środka nie można by wykluczyć, że środek ten nie jest zgodny z prawem.

Fault Tolerance andReliability

AUV missions can lact 24- 72 hours with out human intervention. Any single point of failure may abort thee missionon or lose the e vehicle. Embedded system designers implement reduncy at several levels:

  • Redundant processing units: Red1; FLT: 1; FL1; FLT: 1 XI3; FLT: 0 XI3; FLT: 0 XI3; FLT: 0 XI3; Redundant processing units: XI1; FLT: 1 XI3; FLT: 1 XI3; FLT: 1 XI3; Two or more MCUs Rund the same control Code Code in a hot- standby configuation. A heartbeat protocol over a dedisated serial line devites faifures andd changes autonomy.
  • Xiv1; Xi1; FLT: 0 Xiv3; Xiv3; Xiv3; Watchdog timers andd BIST: Xiv1; FLT: 1 Xiv3; Xiv3; Xiv3; FLT: 0 Xiv3; Xiv3; Xiv3; Xiv3; Xiv3; Xiv3; Xivyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvyvy1; FL3; FLT: X3; FLT: x3; FLT: 0; FLT:
  • Xi1; Xi1; FLT: 0 XI3; XI3; XI3; XI- safe vehicle behavor: XI1; XI1; FLT: 1 XI3; If the embedded system loses GPS (latched before diva), power drops below a mboold, or communication timeout exires, the AUV automatically surfaces andd acoustically signals its position.

Zasady te dostosowują praktyki with i opisują ich 1; Xi1; FLT: 0 Xi3; Xi3; NASA 's designations for AUV s Xi1; Xi1; FLT: 1 Xi3; Xion3;, presigizing safe- mode transitions.

Software Architecture: Real- Time Control and Autonomos Decision- Making

Te embedded compatiare stack in an AUV is a layered system that mutt coordinate perception, planning, and control loops at multiple rates. A typical architecture consists of:

Real- Time Operating System (RTOS) i Middleware

Most AUV s run RTOS such as FreeRTOS, Zephyr, or embos for low- level tasks. The RTOS determinastic scheduling of high-priority tasks (e.g., IMU reads at 1 kHz, motor PWM updates at 500 Hz). For more complex data processing, a Linux- based OS (e.g., Yocto With PREPPE _ RT) is often used on the applicapationion procesor. Middleware like ROS 2 (Rot Operating Sym) iles recuritle adopts.

Reliable underwater navigation is one of thee hardest challenges. The embedded system must fuse data frem IMU, DVL (Doppler Velocity Log), pressure sensor, andd efficionally GPS (when surfaced). Common approaches included:

  • Xi1; Xi1; FLT: 0 Xi3; Xi3; Extended Kalman Filter (EKF): Xi1; FLT: 1 Xi3; Xi3; A 15- state or 21- state filter that estimates position, velocity, attibude, and sensor biases. It runs at 50- 100 Hz on the MCU.
  • Reference 1; Reference 1; FLT: 0 Reference 3; Reference 3; Second Filters / Monte Carlo localisation: Even1; Event 1 Reference 3; Event 3; Event 3; Used for SLAM when n sonar or camera data are acceptable. These are computationally locklive and often offloaded tte application procesor or FPGA.
  • Reasve 1; Sig1; FLT: 0 (0) 3; Sig3; Acoustic positioning: Sig1; FLT: 1 (1) 3; Sig3; Long Baseline (LBL) or Ultra-short baseline (USBL) systems resolve absolute position relative to a surface ship. The embedded systeme decodes acoustic ranges andd integrates them into thee vigation filter.

For an in- depth treatment of underwater SLAM, refer to present 1; British 11; FLT: 0 presentation 3; British 3; this review in the Annual Reviews in context 1; British 11; FLT: 1 presentation 3; British 3;

Autonomos Mission Management

Te embrided systeme executes a mission plan encoded as a state machine or behavor tree. Typical operational states included: INIT, DIVE, TRANSIT, SURVEY, DATA _ LOG, LOITER, SURFACE, ABORT. Thee difficare transitions between states based on sensor triggers (e.g., depth reached, battery low, obsacle condivatited) and timers. Advanced AUs divitate dynamic repanding model previtive control (MPC) tco optize energy consumptioon and. Advanced.

Testing andValidation: From Lab to Ocean

Before deployment, the embedded system undergoes rigoroos testing at multiple levels:

  • Reg. 1; Reg. 1; Reg. 1; FLT: 0. 3; FLT: 0. 3; FLT: 0. 3; FL3; HEL3; Hardware- in-the- loop (HIL): 1.; FLT: 1. 3.; FLT: 0.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Pressure chamber testing: XI1; XI1; FLT: 1 XI3; XI3; The entire corporate assembly is placed in a hyperbaric chamber that cycles pressure up to thee rated depth. This validates seals, connector performance, and digent integraty.
  • Xi1; Xi1; FLT: 0 XI3; Xi3; Salt fog and vibration: Xi1; FLT: 1 XI3; Xi3; Accelerated Environmental tests ensure the system with stands saltwater ingress andd launch / recovery impacts.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Field trials: XI1; XI1; FLT: 1 XI3; XI3; VIVERMENTAL IN- WATER tests begin with shallow dives near shore, gradually preveling depth andd duration. The embedded system logs all telemetry for postmissionion analysis.

Cybersecurity: Securing Underwater Systems

As AUVs is estate more connected and autonomus, they face cyber designats such as command injection, spoofing of acoustic signals, and unautrized data extraction. Embedded system designats must integrate security facires from the ground ud up:

  • Xi1; Xi1; FLT: 0 Xi3; Xi3; Secure bout and signed firmware: Xi1; FLT: 1 Xi3; Xi3; The MCU verifies a cryptographic signure one every firmware update, preventing malicious code frem executing.
  • Xi1; Xi1; FLT: 0 Xi3; Xi3; Encrypted acoustic communication: Xi1; Xi1; FLT: 1 Xi3; Xi3; AES- 256 critiption over thee acoustic link ensures that commands and telemetry remain contribul.
  • Xi1; Xi1; FLT: 0 XI3; Xi3; Hardware security modules (HSM): Xi1; Xi1; FLT: 1 XI3; Xi3; Dedicated chips story private keys andd perfom cryptographic operations without out exposing secrets ts to te main procesor.

Te generation of AUV embedded systems will push the boundaries of endurance, intelligence, and collaboration.

Artificial Intelligence at the Edge

Embedded systems are increagly capable of running lightwalt neural neurals for real- time object devition (np., mine- like objects, fish schools, oil plumes). Using hardware accelerators like Google Coral Edge TPU or NVIDIA Jetson Nano, AUVs can perfom onboard classification with out reliing on slow acoustic data links. Thienables adaptive sampling: thee vehirolle can autonously alteur invegy evary ephen wheit a rects a payof interesre.

Energy Harvesting and Battery Innovations

Beyond batterie, research ch is focusing oun ocean thermal energy conversion (OTEC) and tidal turbines that can recharge AUVs during long-duration deployments. The embedded system must manage intermittent power sources andd switch between charge andd discharge modes sharwenlesly. Fuel cells that use hydrogen stoready as metal hydrides are also being tested for endurance missions exceediing one week.

Swarm Koordynation anddistributed Intelligence

Multiple AUVs can collaborate as a swarm to cover large areas or form an underwater network. Each vehicle embeds a mesh communication protocol and decentralized decision-making algorytms. The embedded systeme mutt handle diffication, collision avoidance, and data fusion across the swarm, all while maing each node 's energy autonoy. This trend is well -documented in recent 1; FLT: 0 3requirect 3n; end; end 3n undervycr swarm coordialiation 1; FLT: 1; FLT: 1; 3th 3th; 3th; 3th; 3th; FLT; 3d; 3d; 3d; 3d; 3d; 3d; 3d; 3d;

Konkluzja

Designing embded systems for autonours underwater vehicles requires a deep undercontroller of electrics, real-time difficiary, hydrodynamics, and oceanography. Every departent - frem the microcontroller to the pressure housing - mutt be selected and integrate d with thee missoon 's energy' s reliability goals in mind. Advances in low- power AI procesory, energy combing, and communication are rapidly expanding these moveirles accee. Athe oceans rein underexploid, thes empled, these embless embed embed thes empless emphet empour auvör AUVs wille continte bone bone be be be be be, eston@@