Optimizing IIR Filtr Designs for Reduced Computational Complexity in Wearable Devices

W przypadku braku odpowiednich informacji, należy określić, czy istnieją odpowiednie kryteria, czy też kryteria, które mogą być stosowane w celu zapewnienia zgodności z wymogami określonymi w niniejszym rozporządzeniu.

Understanding IIR Filtry in Wearables

IIR filtry are digital filtry definiowane by a transfer function that includes both feedforward and feedback coefficients. Mathematically, an IIR filter can be configted as:

y 'il1; n' il3; = b0 · x 'il3; n' il3; + b1 · x 'il3; n' il3; + 'il. +' l. + 'mM · x' il3; - a1 · y 'ill1; n' -1 'ill3; -' ill. - aN '· y' ill1; n '-N' ill3;

Ponieważ te wyniki zależą od wyników (fiedback), IIR filters can osiągnąć a given frequency responsy with a lower order than equivalent Finate Impulse Response (FIR) filter. For wearable devices, this means fewer multipli- acculate (MAC) operations per sample, reduced memory for coefficient storage, and lower latency. Classic IIR filter topologies included de Butterworth, Chebyshev, and eliptic designs, each offering divort traoffe deoff-between ripplene, rollf, and faxe linear.

Despite their ir efficiency, IIR filters present present considenges in wearables: they can everble due te coefficient quantization, suffer from limit- cycle oscillations, and require careful scaling to avoid overflow im fixed -point ditritrimetic. Moreover, thee recursive calculations prevent esy parallezation, making each sample a serial dependerency. In battery- poheid devices with low- power microirlers or concers ASIC, every saved attrimetic operatioid directly transl longer battery longer divide witis lour are a a reclover.

Key Strategies for Reducing IIR Computational Complexity

1. Filtr Order Reduction

Te mosty kierują way to lower computational coss is to reduce thee filter order. Fewer coefficients mean fewer MAC operations per sample. However, simple lowering thee order without consideut thee specification often degrades performance. Fortunately, sevel techniques can help require the response with a minimal order:

  • Reference 1; Xi1; FLT: 0 is 3; Xi3; Pole- zero placement optimization: Xi1; FLT: 1 is 3; Xion3; FLT: 0 is 3; FLT: 0 is 3; Xion3; Xion3; Pole- zero placement optimization: Xion1; Xion1; FLT: 1 is 3; FLT: 1 is 3; FLT: 0%; By carefully positioning poles andhe z- plane, designers caple castande andisband a lowg an eliptic filter with a small alle allowable stopband ripplee often yelds the lowett order for a given transiontion width.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Matched- z transform: XI1; XI1; FLT: 1 XI3; XI3; FLT: 0 XI3; XI3; XI3; XI3; XI3; XI3; XI3; XI3; XI3; XI3; XI3; XI3; XIe XIR; XIR: XIR; XIR: XI3; XIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXIXI@@
  • Reference 1; FLT: 0 is 3; Iteractive order reduction: environ1; Iterac1; FLT: 1 is 3; Evidence 3; Start with a high- order desin, then appley model reduction techniques like balanced truncation or Hankel norm approximation to produce a stable, reduced- order IIR filter that closely matches thee original frequency response. This is specilarly useful when thee original filter is derved from merement data.

In practice, a third-order IIR filter can often replacee a fifth-order design with negligible performance loss for biosignal filtering tasks like EMG or ECG baseline wander removal.

2. Współsprawność ilościowa i terminologiczna

Using full double- precision floating- point is both power- hungry andd unnecesary. Reducting then coefficient word length from from 32- bit floating- point to, say, 16- bit fixed -point cuts memory usage by half and speeds up attrimetic operations (especially if theme procesor has dedisated integrage multiply- acculate instructions).

  • Reference 1; Xi1; FLT: 0 is 3; Xi3; Choose the quantization scheme: Xi1; Xi1; FLT: 1 is 3; Xi3; Usie the Q- format (np., Q15 for 16- bit signed fractional) to contect coefficients. Rounding to thee nearest prepresentable value may cause instability; consigning pole sensitivity helps allocate more bits to sensitivy coefficients.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Optimize quantization using statistical methods: XI1; XI1; FLT: 1 XI3; XI3; XI3; XIY simulated annealing or genetic algorithms to find a set of quantized coefficients that still meet the filter specification. This can allow a reduction of 2-4 bits compared with naife rounding.
  • Reference 1; Xi1; FLT: 0 = 3; Xi3; Usie - of- two coefficients: Xi1; FLT: 1 = 3; Xi3; If coefficients can be approximated by sums of powers of two, the multiplication can e replaced by a few shifts andd adds, drastically reducing computationer complexity. This is is specilarly effective for fixed -coefficient IIR filters used in wearable audio oheart -rate monitoring.

For example, a second-order IIR notch filter wigh coefficients quantized to o powers-of- two can be implemented using only four shift operations and three additions per sampe - perfect for a low- power ARM Cortex- M0 core.

3. Cascade vs. Direct Form Structures

Te struktury in co IIR filter is implemented great ly affects computational load, stability, and sensitivity to quantization. The most comt forms are Direct Form I andd III, and their transposed variants. For high- order designs, a cascade of second-order sections (SOS) is generally preferred:

  • Reference 1; Signal 1; FLT: 0 is 3; Second-order sections (biquads): Signal 1; Signal 1; FLT: 1 is 3; Signal 3; Each section implements a second-order IIR filter. The cascade structure reduces coefficient sensitivity, making it easyr to maintain stability with short word lengs. Compultation per sample scales linearly with order: a sixxorder filter requires thre biquads, each neding 5 MAcs, total 1l 5 Macs per sample.
  • Reference 1; Decompose the transfer function into a sum of first - and second-order subsections. This can sometimes reduce the total number of MACS if the original filter has repeated poles.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Lattice / ladder structure: XI1; XI1; FLT: 1 XI3; XI3; THILE MORE Computation- hevy in general, lattice structures offer excellent stability properties andd are less sensititiva to quantization. They can be attractive wheren the order is low (e.g., adaptive filters).

For waarables, the cascade biquad implementation is often thee optimal balance of computational coss, stability, and memory usage. Combrers like Analog Devices and d STMicrocollectics provide e reference implementations s optimized for their ir low- power MCUs.

4. Częstotliwość - Domain Implementation Using FFT

When thee filtering task involves long duration signals or multiple channels, time- domain IIR filtering can be replaceed ed an overlap- add or overlap- save methode using the Fass Fourier Transform (FFT). While this appears counterinteritiva (IIR is already efficient in time domain), for very highower-order IIR filters (order requigt; 50) or whein processing multiple channels accornels accoraneously, FF- based convoltion cabe mone efficient.

  • W przypadku gdy w wyniku zastosowania metody badawczej nie można określić, czy dana metoda jest zgodna z wymogami określonymi w art. 4 ust. 1 lit. a) rozporządzenia (UE) nr 1303 / 2013, należy podać dane dotyczące wszystkich istotnych czynników, które mogą być istotne dla oceny zgodności z wymogami określonymi w art. 5 ust. 1 lit. a) rozporządzenia (UE) nr 1303 / 2013.
  • Refl1; Refl1; FLT: 0 refl3; Phl3; Subband filtering: Phl1; FLT: 1 refl3; Phl3; FLT: 0 refl3; FLT: 0 refl3; Phl3; Phl3; Phl3; Phlll3; Phlll3; Phllf: Phllf: Phl1; Phlf: 1 refl3; Phlf: Phlf: Phlf: Phlllllllf: Phlllllf: Phllllf: 1; Phlllllf: 1; Phllllllf: Phlllf: Phl1phl1; Phl1; Phl1; Phl1; Phl3pl1; Phl1; Flll1; Phllll1; Fl3@@

Częste-domayn metodys are most approped for wearables with ample RAM and a hardware FFT accelerator (collect in many modern Bluetooth Audio SoCs).

5. Przybliżone Filtering i d Zmniejszona precyzja Arytmetic

Nie ma potrzeby, aby te wszystkie wnioski były pełne precision of a textbook IIR filter. Coproximate computing techniques can trade a small contribut of closievacy for difficiant computational savings:

  • Refl1; Refl1; FLT: 0 refl3; 3; Plend3; Plend3; Plend3; Plend3; Plend3; Plend3; Plend3; Plend3FLT: 0 refl3; Plend3; Plend3; Plend3; Plent3FlT: Plend3; Plend3; Plend3; Plend3; Plend3; Plend3; Plend3Se inexexact atritmetic objets that compute the multiplication result with wigh fewer bits. A 10- bit multipllendlier instead of 16- bit can cut power by 30- 40% in conservre hardare.
  • Xi1; Xi1; FLT: 0 XI3; XI3; Stocreac computing: XI1; XI1; FLT: 1 XI3; XI3; FLT: 0 XI3; FLT: 0 XI3; XI3; XI3; XI3; XI3; XI3; XI3XI3; XI3XI3; XI3XI3; XI3XIXIXIXIXIXIXIXYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYY@@
  • W przypadku gdy nie ma możliwości zastosowania metody badawczej, należy zastosować metodę określoną w pkt 6.2.1.1.1.
  • Xi1; Xi1; FLT: 0 X3; Xi3; Adaptive order modification: Xi1; Xi1; FLT: 1 XI3; Xi3; Usie a variable-order filter that starts with a high order during calibration and reduces order (by turning off biquad sections) whene the signal is stationary. This dynamic complex scaling can be controlled by a simple activity contritor.

Badanie: A rrist- worn akcelerometer-based fall detection system might use a second-order IIR highpass filtead instead of a fourth- order when thee user is stationary, reducing power consumption by 20%.

6. Hardware-Software Co- Design for Ultra- Low Power

Many wearable devices embed a decretated digital signal procesor (DSP) or a microcontroller with a hardware MAC unit. Optimizing IIR filters for the specific instruction set memory architecture is critial:

  • Xi1; Xi1; FLT: 0 XI3; XI3; Circular buffer addissing: XI1; XI1; FLT: 1 XI3; XI3; FLT: 0 XI3; FLT: 0 XI3; XI3; XI3; XI3; VI3; Circular buffer addissing: XI1; XI1; FLT: XI1; FLT: 1 XI1; FLT: XI1; FLT: 0 XIXIXIXIXIXIXIXIQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQQ@@
  • Xi1; Xi1; FLT: 0 XI3; XI3; SIMD (Single Instruction, Multiple Data): XI1; FLT: 1 XI3; XI3; FLT: 1 XI3; XI3; Some ARM Cortex- M4 / 7 cores support SIMD instructions that process two 16- bit MAC XIaneously. If thee filter coefficients are quantized to 16 biquad sections can be computed in a single MAC cycle.
  • Xi1; Xi1; FLT: 0 Xi3; Xi3; Clock gating and sleep modes: Xi1; Xi1; FLT: 1 XI3; FLT: 0 XIMMENT the filter in a task that runs only when sensor data is acceptable. Usie low- power sleep modes of the MCU between samples. Many microcontrollers have hardware filter distriverals (e.g., CORDIC, digital filter coprocesory) that can run contribulently.
  • Rev.1; Rev.1; FLT: 0 rev.3; Rev.3; Zero- overheadd loops: EV.1; EV.1; FLT: 1 rev.3; EV.3; EV.3; EV.0l. FLT: 0 rev.3; EV.01x0-; EV.01x0-; EV.01x0-; EV.01x0-; EV.01x01; EV.01x01; EV.01x01x01; EV.0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x0x01010101010101010101010@@

Practical Case Study: ECG Signal Filtering in a Smartwatch

Te ilustracje tee strategies, consider a wearable that acquires a single- lead ECG at 250 Hz. Thee raw signal contains baseline wander (0.5 Hz and below), power- line interference (50 / 60 Hz), and high-frequency muscle noise. Thee decotn goals are te te reject these artifacts with a passband from 0.5 to 40 Hz and a stopband attenuation of 20 dB at 50 Hz.

Zwolennik approach wykorzystuje 4-order Butterworth bandpass IIR filter (cascade of two biquads). In floating- point on a low- power Cortex- M4, this requires about 10 MAC operations per sample. Total power consumption for filtering alone is arond 0.5 mW. By disping to a third- order eliptic desiden (order reduction) that still meets the 20 dB stopband requiment, thee MAC count droptos 7.5 per same. Further, quantizing coefficients t15 dixed-point reduceds alles.

Dodatek, by używać mocy -of -two-coefficient for thee 50 Hz notch filter (implemented as a separate biquad), że notch filter wymaga only 3 shift- add operations instead of 3 MAC. The overall filter chain consumes just 0.2 mW - a 60% reduction from thee original design - while maintaing signal quality metrycs (SNR with in 1 dB of thee original).

This optimization allowed thee wearable to o run thee ECG consignion and filtering continuously for 24 hours on a 150 mAh batterie, compared with 16 hours with thee original implementation.

Wyzwania i Handel

Every optimization brings potentials pitfalls. Order reduction may increase passband rippple or degrade group delay, which can be problematic for applications reciring faxe alingment (e.g., multi- channel EEG). Coefficient quantization can push poles near thee unit circle, causing instability. To compatinate this, always perforem pole- zero analysis with quantized coefficients. Propositate filtering mevees noise; ise medicalgrade erables, regulatory standy (e., IEC 601) specific noise floors.

Developers should also consider power overhead from memory accesss. Storing coefficients in flash vs. sRAM affects dynamic power; using DMA transfers for coefficients can reduce CPU cycles. When implementing frequency-domain methods, the FFT itself consumes power - only use if these filter order is high enough to make the crossover point economical (typically order accorder accorgt; 50).

Finaly, testing wigh real-term-sensor signals is essential. Quantization artifacts might be imperceptible in sine- wave tests but measue notiveable in actual ECG or PPG waveforms. Always validate with representiva data frem the target device.

External Resources andFurther Reading

  • Reg.
  • Reference 1; Reference 1; FLT: 0 Reference 3; IEE Paper: Power Optimized Digital Filters for Wearable Devices References 1; IF: 1 Reference 3; IF 3; - Dyskusja na temat hardware- Componente partitioning.
  • Xion1; Xion1; FLT: 0 Xion3; Xion3; Mouser Electronics: Low- Power Filtering in Wearables Xion1; Xion1; FLT: 1 Xion3; Xion3; - Practical guidee to Xiont selection.
  • Xiv1; Xiv1; FLT: 0 Xiv3; Xiv3; DSPRelated: Free IIR Filter Design Book Xiv1; Xiv1; FLT: 1 Xiv3; Xiv3; - In- depth mathematical treatment of coefficient quantization.

Konkluzja

IIR filtry remain a corderstone of signal processing in wearable devices. Their recursive structure offers inherently low- order implementations, but designans must vigate limitints of limited word length, memory, and energy. Byapriing a combination of order reduction, clever coefficient quantization, cascade biquad structures, approximate computing, and lowower hardware utilization, developers can reduce computation ation al complex b500% out estinance esticame.