How to Implement a Peak Detector Circuit with Operational Amplifiers for Signal Monitoring

A peak detector is an analog circuit that captures the maximum amplitude of an input signal and holds that voltage as a stable DC level until a larger peak arrives or the circuit is reset. This function is essential in signal monitoring applications such as audio level metering, RF envelope detection, and industrial sensor data capture. When built with operational amplifiers (op-amps), the circuit overcomes the limitations of passive diode-capacitor networks by using active feedback to eliminate the forward voltage drop and provide precise voltage retention. The result is a near-ideal rectifier that can track fast transients with microvolt accuracy.

In its simplest form, an op-amp drives a diode that charges a hold capacitor when the input exceeds the capacitor's stored voltage. When the input falls, the diode reverse-biases, isolating the capacitor and preserving the peak. A high-impedance buffer reads the stored voltage without drawing significant charge. Because the op-amp's open-loop gain effectively divides the diode drop by the gain (often more than 100,000), the error introduced by the diode is negligible. For accurate operation, the op-amp must have sufficient slew rate to follow the fastest expected signal edges. Audio frequencies up to 20 kHz can be handled by general-purpose parts like the LM741 (0.5 V/µs), but high-speed pulses or RF envelopes demand a wider bandwidth device such as the LM318 (50 V/µs) or a dedicated video amplifier.

Fundamentals of Op-Amp Peak Detection

Three core building blocks define every peak detector: a comparator-like configuration that charges a capacitor when the input exceeds stored voltage, a storage element (the capacitor), and a buffer to read the voltage without discharging it. The key advantage of using an op-amp instead of a simple diode and capacitor is the ability to rectify signals smaller than a diode's forward voltage. Without feedback, a 100 mV sine wave would be lost in the 0.6 V drop of a silicon diode. With the op-amp in a precision rectifier topology, the feedback loop forces the diode to conduct at exactly the right voltage to track the input, effectively reducing the drop to microvolts.

However, practical limitations remain. Input offset voltage, bias current, and the op-amp's output current capability all affect accuracy. FET-input op-amps such as the TL071 or OPA134 have negligible bias currents (picoamperes), making them ideal for long hold times. Bipolar-input devices like the NE5532 may require larger hold capacitors to limit droop, but they offer lower noise for audio applications. The choice of op-amp is a trade-off between speed, precision, and cost.

Positive versus Negative Peak Detection

Most circuits detect positive peaks, but reversing the diode and swapping the op-amp's inputs yields a negative peak detector. For full-wave envelope extraction, combine positive and negative detectors with a summing amplifier. In many sensor applications, the polarity of the signal is known, so a single polarity detector suffices. When the signal is bipolar, a precision full-wave rectifier followed by a peak detector may be simpler than two separate detectors.

Precision Peak Detectors: Eliminating Offset and Leakage

Basic op-amp diode circuits still suffer from input offset voltage and reverse recovery charge injection. A precision peak detector adds a second op-amp as a unity-gain buffer to isolate the hold capacitor from loading. The first op-amp charges the capacitor through the diode; the second reads the voltage without drawing charge. This reduces droop to a few millivolts per second when using low-leakage capacitors and FET-input amplifiers. For periodic measurements, a reset switch (JFET or analog switch) discharges the capacitor on command, enabling efficient peak capture in data acquisition systems. Common precision devices include the AD8628 (zero-drift, autozero) and the OPA388 (ultra-low offset).

Component Selection and Trade-Offs

Every component influences acquisition time, droop, accuracy, and bandwidth. The following sections detail critical parameters for op-amp, diode, capacitor, and reset mechanism.

Operational Amplifier

Slew rate (SR): Determines the fastest rising edge the detector can track. For a sine wave of frequency f and peak voltage V_p, the required SR is SR ≥ 2π f V_p. A 5 V peak at 20 kHz requires about 0.63 V/µs—easily met by most op-amps. For steep pulse edges, 10 V/µs or more may be needed. Choose a device with SR at least twice the minimum to avoid distortion.
Input bias current (I_B): FET-input op-amps (TL071, OPA134, AD8628) exhibit picoampere bias currents, minimizing capacitor discharge via the input pin. Bipolar devices (NE5532) may require larger hold capacitors to limit droop, which slows acquisition. For hold times over one second, FET-input or CMOS amplifiers are strongly recommended.
Output drive and capacitive load handling: Driving a capacitor directly can cause oscillation. A small resistor (10–100 Ω) in series with the output damps ringing without significantly affecting charging current. The op-amp's short-circuit current (typically 20–40 mA) sets the maximum charging rate. For large capacitors (e.g., 10 µF), a current-boosting buffer stage may be necessary.
Supply voltage range: Rail-to-rail input/output devices (MCP6022, OPA340) simplify single-supply operation, allowing the input to swing close to ground or the supply rail. This is especially useful in battery-powered instruments where only a single positive rail is available.

Diode

The standard 1N4148 small-signal diode works well for low-current applications up to a few hundred megahertz. Its forward voltage at 1 µA is about 0.4 V; within the op-amp feedback loop, the effective drop is reduced by the gain, yielding excellent accuracy. For higher currents or when fast charging from a low-impedance source is needed, a Schottky diode (1N5819) offers lower forward voltage and faster reverse recovery. Avoid standard rectifier diodes (1N400x) because of high junction capacitance and long reverse recovery time, which degrade high-frequency performance. Also consider using a dual diode (BAV99) to match leakage characteristics in balanced circuits.

Hold Capacitor

Capacitance value: Larger values (1–10 µF) extend hold time but increase charging time. For audio-rate signals, 470 nF to 2.2 µF is typical. The choice balances droop and acquisition speed. For DC-coupled precision measurements, a value of 100 nF may be sufficient if the buffer has extremely low bias current.
Dielectric type: Polypropylene or polystyrene film capacitors exhibit extremely low dielectric absorption and leakage, making them ideal for precision analog holding. X7R ceramics are acceptable in less demanding circuits, but their voltage coefficient can introduce non-linearity, causing the stored voltage to change with input level. NP0/C0G ceramics are better but limited to small values. Electrolytic capacitors are unsuitable due to high leakage currents, unless refreshed frequently.
Leakage considerations: Even 10 nA leakage can discharge a 1 µF capacitor by 10 mV/s. Use guard rings on the PCB around the high-impedance node and clean the board thoroughly after soldering to minimize surface leakage. In extreme precision applications, select a capacitor with an explicit leakage specification (e.g., <10 nA at rated voltage).

Discharge Mechanism and Reset

A parallel resistor creates a controlled decay, useful for audio peak program meters where the display should return to zero slowly. The time constant R × C defines decay rate (e.g., 1 MΩ with 1 µF gives τ = 1 s, dropping to 37% after one second). For sharp hold with manual reset, replace the resistor with a depletion-mode MOSFET (2N7000) or an analog switch (CD4066) driven by a logic pulse. Low-charge-injection switches (ADG601) minimize offset glitches during switching. In high-speed pulsed systems (e.g., nuclear pulse height analysis), a wideband reset transistor with low stray capacitance is essential to avoid distorting the captured peak.

Step-by-Step Circuit Construction: Single Op-Amp Positive Peak Detector

The following procedure builds a basic positive peak detector using a single operational amplifier. A second op-amp buffer is recommended for driving low-impedance loads or an ADC. Standard 8-pin DIP pinout is assumed.

Connect the input signal to the non-inverting input (pin 3) through a coupling capacitor if DC offset needs removal. Use a 10 kΩ resistor to ground from the non-inverting input to set a reference (for single-supply, bias at mid-rail using a voltage divider).
Wire the inverting input (pin 2) to the cathode of the diode. The anode connects to the op-amp output (pin 6). The cathode also connects to the positive terminal of the hold capacitor; the negative terminal goes to ground.
Optionally add a 1 MΩ resistor in parallel with the capacitor for a slow decay (adjust for desired time constant). For precise hold times, use a potentiometer to trim the discharge resistor value.
Place a 100 Ω resistor in series with the op-amp output to isolate capacitive loading and prevent oscillation. This resistor also limits the charging current during fast transients.
Power the op-amp with a bipolar supply (±5 V to ±15 V) for bipolar input signals. For single-supply, use a rail-to-rail device and bias the non-inverting input at V_CC/2.
Connect the capacitor's positive terminal to the input of a second op-amp (the other half of a dual package) configured as a unity-gain buffer. This buffer drives subsequent stages without discharging the capacitor.

The circuit operates as follows: When the input exceeds the capacitor voltage, the op-amp raises its output, forward-biases the diode, and charges the capacitor until the voltage matches the input. When the input drops, the op-amp output tries to go low, reverse-biasing the diode, and the capacitor holds the peak. With a discharge resistor, the voltage decays exponentially until the next peak appears. Notice that during the decay, the op-amp output may swing to the negative rail or below the input common-mode range; this is normal unless the op-amp exhibits phase inversion. For single-supply operation, use a device with rail-to-rail inputs.

Adding a Reset Switch

For active reset, connect an N-channel MOSFET (2N7000) or analog switch across the capacitor. Apply a short logic-high pulse to discharge it. After reset, the detector immediately tracks the next peak. Precision designs use low-charge-injection switches (ADG601) to avoid injecting a small charge onto the capacitor during switching, which would appear as an offset. The reset pulse duration should be at least 5× the RC time constant of the discharge path (typically a few microseconds for MOSFETs).

Performance Calculations: Response Time and Droop

Two key formulas help predict performance and guide component selection.

Acquisition time depends on the op-amp's slew rate and charging current. The short-circuit current (I_SC) is often the limiting factor for large capacitors: dV/dt = I_SC / C. For a 1 µF capacitor and I_SC = 30 mA, the charging rate is 30 V/ms. In practice, the op-amp's internal slew rate may dominate for small capacitors. For a sine wave, ensure SR ≥ 2π f V_p. For pulse inputs, the required SR is ∆V/∆t, where ∆V is the voltage step and ∆t is the pulse rise time. For a 5 V step in 1 µs, SR = 5 V/µs, so an LM318 (50 V/µs) is more than adequate, but an LM741 (0.5 V/µs) will fail.

Droop rate in hold mode is dominated by capacitor self-discharge and the buffer's input bias current. For a 1 µF capacitor and buffer with I_B = 50 pA, droop is I_B/C = 50 µV/s. However, leakage from the diode reverse bias and PCB contamination often exceeds this. Use low-leakage diodes (BAV199) and clean the board thoroughly. Adding a guard ring driven by the buffer output minimizes surface leakage. Droop can also be reduced by increasing the capacitor value, but that slows acquisition time and may require a buffer with higher capacitive drive capability.

Testing and Verification

Bring up the circuit with a known test signal to confirm operation. Use a function generator and oscilloscope for visual verification.

Apply a 1 kHz sine wave; observe the output as a DC level equal to the peak amplitude minus a few millivolts. Vary the amplitude; the output should track rising peaks and hold during downward steps. Measure the error between the peak of the input and the output voltage.
Inject a fast 1 V pulse with 100 ns rise time. Watch the output rise and settle. If overshoot occurs, add a small feedback capacitor (10–22 pF) between output and inverting input, or increase the series resistor to 470 Ω. Overshoot indicates that the op-amp's bandwidth is too high for the diode's recovery time.
Measure droop with a digital multimeter in a stable environment. A good circuit holds within 10 mV for several seconds. For longer hold times, use an electrometer-grade buffer (e.g., LMC662).
Use a function generator with amplitude modulation (e.g., 50% modulation depth at 100 Hz) to verify envelope detection—the output should follow the modulation envelope with some smoothness determined by the discharge time constant.

Applications in Signal Monitoring

Peak detectors serve as front-ends for many measurement and control systems, providing a simple way to capture transient events without fast continuous sampling.

Audio level meters: A peak detector with defined decay (e.g., 10 dB/s) drives bargraph displays or ADCs in peak program meters (PPM) and VU meters. The decay time constant is chosen to be short enough to show individual peaks but long enough to be visible to the human eye.
RF power measurement: In wireless transmitters, a directional coupler feeds a Schottky detector; an active peak detector captures the envelope for AGC loops or power monitoring. Analog Devices AN-423 details fast envelope detectors for pulsed RF.
Sensor interfaces: Industrial sensors (strain gauges, accelerometers, pressure transducers) often produce rapidly fluctuating voltages. A peak detector captures maximum excursions without requiring fast continuous sampling, reducing data acquisition system complexity and cost.
Pulse height analysis: In nuclear instrumentation, each pulse from a photomultiplier tube has amplitude proportional to particle energy. A peak detector holds the maximum of each pulse for ADC conversion. A reset pulse after conversion readies the detector for the next event. The detector must have low droop to avoid errors during the conversion time.
Power supply monitoring: Detect the highest voltage on a supply rail during surges or transients for protection circuits or data loggers. A peak detector with a long hold time can record the worst-case voltage excursion over an extended period.
Envelope detection for AM demodulation: Combine positive and negative peak detectors with a summing amplifier for full-wave envelope extraction with better linearity than a simple diode detector. This technique is used in high-quality AM receivers and spectrum analyzers.

Advanced Topics and Extensions

Comparator-Based Peak Detector

When speed is critical and offset tolerance is acceptable, replace the op-amp with a high-speed comparator (e.g., LM311, LT1711). The comparator output drives the diode directly, charging the capacitor only when the input exceeds the held voltage. Because comparators lack linear feedback, a small hysteresis resistor is added to prevent oscillation around the peak. This technique is ideal for digital pulse peak capture where the value is read by a microcontroller's ADC after a short settling period. Comparators offer propagation delays under 10 ns, enabling capture of sub-nanosecond pulses.

Digital Peak Detection

Modern microcontrollers with fast ADCs can perform peak detection in software, but an analog peak detector reduces required sampling rate and processing power. The analog front end holds the peak for several microseconds while the ADC performs a conversion, improving system efficiency. Some SoCs (Cypress PSoC, Microchip PIC) integrate a programmable gain amplifier and peak detector before the ADC, allowing a single chip to handle analog preprocessing. Digital peak detection also eliminates droop, but introduces quantization errors and latency.

Envelope Tracking and AGC

In amplitude modulation (AM) receivers, the peak detector extracts the audio envelope. Adding a low-pass filter after the capacitor smooths the envelope to recover the original signal. In automatic gain control (AGC) circuits, the peak detector output feeds an error amplifier that adjusts a variable gain stage, maintaining constant output level despite input variations. The detector's attack and decay time constants determine AGC response speed. For AGC, a fast attack (to respond quickly to large signals) and slower decay (to avoid pumping) are typical. A diode in parallel with the discharge resistor can achieve asymmetric attack/decay times.

Choosing the Right Op-Amp for Low-Frequency Precision

For sub-audio signals (strain gauges, DC-coupled sensors), a zero-drift op-amp such as the OPA388 or MAX4238 minimizes input offset drift and 1/f noise. These devices have FET inputs and offset voltages below 5 µV, ensuring microvolt accuracy. Pair with a polypropylene capacitor and a low-leakage reset switch for hold times of minutes. Such precision appears in electronic load cells, tilt sensors, and reference comparators. The OPA388 has a typical bias current of only 10 pA, allowing a 1 µF capacitor to droop less than 10 µV per second.

Practical Example: Audio Peak Program Meter

Design a peak detector for line-level audio (±1 V). Requirements: respond to peaks as short as 1 ms, hold visibly, and decay about 10 dB per second for a convincing bargraph display.

Choose a TL072 op-amp (slew rate 13 V/µs, FET inputs) for the detector and buffer. Use a 1N4148 diode. Select a 470 nF film capacitor and a 220 kΩ discharge resistor (time constant = 220e3 × 470e-9 ≈ 0.103 s; decay to 37% ≈ -8.7 dB in 0.1 s, close to 10 dB/s). Buffer the capacitor with the second half of the TL072 to drive a 10-LED bargraph driver (LM3914). Power from ±12 V. Add a 47 Ω resistor in series with the diode to damp ringing, and 100 nF bypass capacitors at each power pin. The entire circuit fits on a small perfboard and draws under 5 mA. For faster response to brief transients, reduce the capacitor to 100 nF and the resistor to 100 kΩ to maintain the same time constant, but the smaller capacitor will have higher droop. In practice, 470 nF provides a good balance for music signals.

Troubleshooting Common Issues

Oscillation or ringing: Add a series resistor (100–470 Ω) between op-amp output and diode, or a small feedback capacitor (10–22 pF) from output to inverting input. Check power supply decoupling—every op-amp should have 0.1 µF ceramic capacitors placed as close as possible to the supply pins.
Output fails to reach peak; large offset appears: Verify diode orientation. In an inverting precision rectifier, cathode must connect to capacitor. Ensure input signal stays within common-mode limits. Check for current limiting caused by excessive series resistance or a weak op-amp output driver. For very low signals (<10 mV), consider a zero-drift op-amp.
Excessive droop: Measure capacitor leakage and diode reverse leakage. Replace with a film capacitor and low-leakage diode (BAV199). Clean board with isopropyl alcohol to remove flux residues. Add guard ring around high-impedance node, driven by the buffer output to shield the capacitor terminal from surface currents.
Slow response to fast peaks: Op-amp may be slew-rate limited. Switch to faster part (LM318, 50 V/µs) or reduce capacitor size (but increased droop will require faster buffer). Also verify that the series resistor isn't too large—it may limit charging current. If using a dual op-amp, ensure the buffer stage doesn't load the capacitor with its input capacitance (typically a few pF, which is fine).
Output stuck near supply rail: Check for latch-up. Some op-amps (especially older bipolar designs) can phase invert when non-inverting input far exceeds inverting input (as when diode is off). Use a diode clamp or select a device with over-the-top inputs (LT1637) or with rail-to-rail input stages that avoid phase reversal.